As a result of the continuous developments in integrated circuits (ICs), the flip-flops contribute to a substantial portion of any circuit design's power. The various units of an IC that consume power are logic implementation, flip-flops, RAM, clock tree and integrated clock gating (ICG) cells. The comparison of the power consumption by the various units is as follows; logic implementation 29%, flip-flops 27%, RAM 18%, clock tree 16% and the ICG consumes 10% of the total power in a typical design. In digital designs, the flip-flops form 20-40% of the digital sub-chips.
A reduction in a number of transistors in a flip-flop will reduce the area and therefore power consumed inside a flip-flop. A reduction in area of flip-flops will directly improve the digital design area and the overall power consumption. A flip-flop consists of a master latch and a slave latch. Both master latch and slave latch requires an even number of inverters. Thus, a minimum of 4 inverters are present in the flip-flop. Thus, a reduction in a number of inverters will directly reduce the area of the flip-flop.